The present invention generally relates to a method and a structure for forming relatively planar field isolation structures in field effect transistor (FET) devices. More particularly, the present invention is directed to an insulation configuration in the bird's beak region of field effect transistors so as to include a thin layer of silicon oxide which is formed thermally over which a thicker layer of insulative material is present so as to provide a high degree of radiation hardness.
In the fabrication of field effect transistors on integrated circuit chips, it is necessary to provide an active region typically comprising a doped semiconductor body such as n-doped silicon. This doping may be disposed uniformly throughout the silicon substrate. In other situations, it is desirable to also employ pockets of p-doped well regions, as for example, in the fabrication of CMOS (complementary metal-oxide-semiconductor) devices. Active regions in the semiconductor substrates must be provided with means for insulating various devices on the circuit chip from one another. This insulative function is provided by regions of silicon oxide formed on the substrate. This oxide is referred to as the field oxide.
As device sizes have shrunk, the desire and necessity for not increasing the number of processing steps used in integrated circuit fabrication has persisted since each step carries with it the possibility of defect formation or contamination. Furthermore, particularly with respect to masking steps, it is desirable to employ as few masking operations as possible to avoid problems of registration and alignment which become critical, particularly when feature sizes below 1 micron in line width are present. Accordingly, processes for integrated circuit manufacture must be designed with these restrictions in mind.
In the formation of field oxide regions, there is a transition region between active doped silicon areas (the active regions) and the relatively thick field oxide which surrounds the active areas. This region is referred to as the bird's beak region owing to its shape, particularly when viewed from a cross-sectional direction along a planar cut perpendicular to the substrate surface. It is the problems which are associated with the bird's beak region to which the present invention is particularly directed. More particularly, it has been found that radiation entering the bird's beak region produces undesirable electrical effects. This problem has increased as device size has shrunk and is a particular problem in memory circuits which are generally densely packed on a chip and which are adversely affected by stray radiation, even background radiation such as that found in earth orbit satellite situations. Accordingly, it is seen that it is very desirable to be able to provide a radiation hard structure in the bird's beak region of field effect transistors employed in very large scale integrated circuit chip devices. It is also desirable to be able to provide a radiation hard structure and method while at the same time maintaining device planarity and without adversely increasing the number of processing steps that are required, particularly masking steps.